Mach Motherboard Spezifikationen

http://www.digital.com/semiconductorDigital Equipment CorporationMaynard, MassachusettsDigital SemiconductorAlphaPC 164 MotherboardTechnical Reference

A–26 System Address MappingSubject to Change – 17 January 199721164 Address Space•Bytes 0 and 1 contain the encoded message.•Bytes 2 and 3 contain a m

17 January 1997 – Subject to ChangeSystem Address Mapping A–2721164 Address SpaceFigure A–13 Byte/Word PCI SpaceEach of these regions operates identic

A–28 System Address MappingSubject to Change – 17 January 199721164 Address SpaceThe size field (address bits <38:37>) is added by the 21164 har

17 January 1997 – Subject to ChangeSystem Address Mapping A–29PCI-to-Physical Memory AddressingA.4 PCI-to-Physical Memory AddressingThis section descr

A–30 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingBased on the value of the window mask register, the unm

17 January 1997 – Subject to ChangeSystem Address Mapping A–31PCI-to-Physical Memory AddressingA.4.1.1 PCI Device Address SpaceA PCI device specifies

A–32 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingFigure A–14 PCI DMA Addressing ExampleFigure A–14 also

17 January 1997 – Subject to ChangeSystem Address Mapping A–33PCI-to-Physical Memory AddressingFigure A–15 PCI Target Window CompareThe comparison log

A–34 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingA.4.2 Direct-Mapped AddressingIf Wn_BASE [Wn_BASE_SG] i

17 January 1997 – Subject to ChangeSystem Address Mapping A–35PCI-to-Physical Memory AddressingA.4.3 Scatter-Gather AddressingWhen Wn_BASE[Wn_BASE_SG]

17 January 1997 – Subject to Changexi PrefaceOverviewThis manual describes the DIGITAL AlphaPC 164 motherboard, a module for computing systems based o

A–36 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingEach scatter-gather map entry maps an 8KB page of PCI a

17 January 1997 – Subject to ChangeSystem Address Mapping A–37PCI-to-Physical Memory AddressingA.4.3.1 Scatter-Gather Translation Lookaside Buffer (TL

A–38 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingFigure A–18 Scatter-Gather Associative TLBEach time an

17 January 1997 – Subject to ChangeSystem Address Mapping A–39PCI-to-Physical Memory AddressingFigure A–19 shows the entire translation process, from

A–40 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingFigure A–19 Scatter-Gather Map Translation33n-11OffsetO

17 January 1997 – Subject to ChangeSystem Address Mapping A–41PCI-to-Physical Memory AddressingA.4.4 Suggested Use of a PCI WindowFigure A–20 shows a

A–42 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingA.4.4.1 PCA Compatibility Addressing and HolesThe perip

17 January 1997 – Subject to ChangeSystem Address Mapping A–43PCI-to-Physical Memory Addressing•The MAR1, 2, and 3 registers enable various BIOS regio

A–44 System Address MappingSubject to Change – 17 January 1997PCI-to-Physical Memory AddressingFigure A–22 Memory Chip Select Signal (mem_cs_l) LogicC

17 January 1997 – Subject to ChangeI/O Space Address Maps B–1 BI/O Space Address MapsThis appendix provides lists of the physical AlphaPC 164 I/O spac

xiiSubject to Change – 17 January 1997•Chapter 4, Functional Description, provides a functional description of the AlphaPC 164 motherboard, including

B–2 I/O Space Address MapsSubject to Change – 17 January 1997PCI Sparse I/O SpaceB.2.1.1 FDC37C935 Combination Controller Register Address SpaceTable

17 January 1997 – Subject to ChangeI/O Space Address Maps B–3PCI Sparse I/O Space2FE 85.8000.5FC0 COM2 modem status2FF 85.8000.5FE0 COM2 scratch padPa

B–4 I/O Space Address MapsSubject to Change – 17 January 1997PCI Sparse I/O Space3F8 0DLAB=1 85.8000.7F00 COM1 divisor latch (LSB)3F9 1DLAB=0 85.8000.

17 January 1997 – Subject to ChangeI/O Space Address Maps B–5PCI Sparse I/O SpaceB.2.1.2 Flash ROM Segment Select RegisterThe flash ROM is partitioned

B–6 I/O Space Address MapsSubject to Change – 17 January 1997PCI Sparse I/O SpaceB.2.1.4 Interrupt Control PLD AddressesTable B–4 lists the registers

17 January 1997 – Subject to ChangeI/O Space Address Maps B–7PCI Sparse I/O Space00D 85.C000.01A0 DMA1 master clear00E 85.C000.01C0 DMA1 clear mask00F

B–8 I/O Space Address MapsSubject to Change – 17 January 1997PCI Sparse I/O Space08D 85.C000.11A0 DMA page register reserved08E 85.C000.11C0 DMA page

17 January 1997 – Subject to ChangeI/O Space Address Maps B–9PCI Sparse I/O Space0D6 85.C000.1AC0 DMA2 write mode0D8 85.C000.1B00 DMA2 clear byte poin

B–10 I/O Space Address MapsSubject to Change – 17 January 1997PCI Dense Memory SpaceB.3 PCI Dense Memory SpacePCI dense memory space occupies physical

17 January 1997 – Subject to ChangeI/O Space Address Maps B–11PCI Dense Memory SpaceB.3.2 Map of Flash ROM MemoryTable B–7 provides a map of flash ROM

17 January 1997 – Subject to Changexiii•Binary MultiplesThe abbreviations K, M, and G (kilo, mega, and giga) represent binary multiples and have the f

B–12 I/O Space Address MapsSubject to Change – 17 January 1997PCI Dense Memory SpaceAll flash ROM accesses (except for read operations) require two bu

17 January 1997 – Subject to ChangeI/O Space Address Maps B–13PCI Configuration Address SpaceB.4 PCI Configuration Address SpaceThe PCI configuration

B–14 I/O Space Address MapsSubject to Change – 17 January 1997PCI Configuration Address Space41 87.0008.0820 PCI arbiter control42 87.0008.0840 PCI ar

17 January 1997 – Subject to ChangeI/O Space Address Maps B–15PCI Special/Interrupt Acknowledge Cycle Address SpaceB.5 PCI Special/Interrupt Acknowled

B–16 I/O Space Address MapsSubject to Change – 17 January 1997Hardware-Specific and Miscellaneous Register SpaceB.6.2 CIA Memory Control CSR SpaceCIA

17 January 1997 – Subject to ChangeI/O Space Address Maps B–17Hardware-Specific and Miscellaneous Register SpaceB.6.3 CIA PCI Address Translation Map

B–18 I/O Space Address MapsSubject to Change – 17 January 1997Hardware-Specific and Miscellaneous Register SpaceLTB_TAG0 RW 87.6000.0800 Lockable tran

17 January 1997 – Subject to ChangeI/O Space Address Maps B–19Hardware-Specific and Miscellaneous Register SpaceTB4_PAGE2 RW 87.6000.1480 Translation

B–20 I/O Space Address MapsSubject to Change – 17 January 199721164 Microprocessor Cbox IPR SpaceB.7 21164 Microprocessor Cbox IPR SpaceThe 21164 micr

17 January 1997 – Subject to ChangeSROM Initialization C–1 CSROM InitializationThe 21164 microprocessor provides a mechanism for loading the initial i

xivSubject to Change – 17 January 1997Data UnitsThe following data-unit terminology is used throughout this manual.NoteNotes emphasize particularly im

C–2 SROM InitializationSubject to Change – 17 January 1997Firmware Interface10. Copy the contents of the system flash ROM to memory and begin code exe

17 January 1997 – Subject to ChangeSROM Initialization C–3Automatic CPU Speed DetectionC.3 Automatic CPU Speed DetectionThe AlphaPC 164 TOY clock dete

C–4 SROM InitializationSubject to Change – 17 January 1997Memory InitializationC.4 Memory InitializationEight consecutive row address strobe (RAS) cyc

17 January 1997 – Subject to ChangeSROM Initialization C–5Special ROM HeaderC.6 Special ROM HeaderThe MAKEROM tool is used to place a special header o

C–6 SROM InitializationSubject to Change – 17 January 1997Special ROM HeaderTable C–2 describes each entry in the special header.Table C–2 Special Hea

17 January 1997 – Subject to ChangeSROM Initialization C–7Special ROM HeaderFirmware ID The firmware ID is a byte that specifies the firmware type. Th

C–8 SROM InitializationSubject to Change – 17 January 1997Flash ROM LoadingC.7 Flash ROM LoadingUnder normal conditions, the AlphaPC 164 loads and exe

17 January 1997 – Subject to ChangeSROM Initialization C–9Flash ROM AccessC.8 Flash ROM AccessThe flash ROM can be viewed as two banks of 512KB each.

C–10 SROM InitializationSubject to Change – 17 January 1997Icache Flush CodeC.9 Icache Flush CodeThe following code is loaded into memory after the sy

17 January 1997 – Subject to ChangeSupporting Products D–1 DSupporting ProductsThis appendix lists sources for components and accessories, some of whi

17 January 1997 – Subject to ChangexvIn some cases, more than one schematic page is referenced. For example, the following specifies schematic pages 1

D–2 Supporting ProductsSubject to Change – 17 January 1997Thermal ProductsA heat-sink and fan solution. Components included: heat sink, GRAFOIL pad, t

17 January 1997 – Subject to ChangeGlossary and Acronyms E–1 EGlossary and AcronymsThis glossary provides definitions for terms and acronyms associate

E–2 Glossary and AcronymsSubject to Change – 17 January 1997busA group of signals that consists of many transmission lines or wires. It interconnects

17 January 1997 – Subject to ChangeGlossary and Acronyms E–3EBSDKEvaluation board software design kit.ECCError correction code. A 16-bit ECC is passed

E–4 Glossary and AcronymsSubject to Change – 17 January 1997PGAPin grid array.PLAProgrammable logic array.PLDProgrammable logic device.PLLPhase-locked

17 January 1997 – Subject to ChangeGlossary and Acronyms E–5RISCReduced instruction set computing. A computing system architecture with an instruction

E–6 Glossary and AcronymsSubject to Change – 17 January 1997write-through cacheA cache in which copies are kept of any data in the region. Read operat

17 January 1997 – Subject to ChangeSupport, Products, and Documentation F–1 FSupport, Products, and DocumentationIf you need technical support, a Digi

F–2 Support, Products, and DocumentationSubject to Change – 17 January 1997Digital Semiconductor DocumentationThe following table lists some of the av

17 January 1997 – Subject to ChangeSupport, Products, and Documentation F–3Ordering Third–Party DocumentationYou can order the following third-party d

xviSubject to Change – 17 January 1997Operations that produce UNPREDICTABLE results might also produce exceptions.– An occurrence specified as UNPREDI

17 January 1997 – Subject to ChangeIndex–1Index Numerics21164Cbox IPR space,B–2021172 core logic chipset. See Chipset.21172-BA. See DSW.21172-CA. See

Index–2Subject to Change – 17 January 1997keyboard,2–11microprocessor fan,2–12mouse,2–11parallel bus,2–10PCI bus,2–7pinouts,2–7 to 2–13speaker,2–12SRO

17 January 1997 – Subject to ChangeIndex–3JJumper configurations,2–4Jumpers,2–3Bcache size,2–6Bcache speed,2–6boot option,2–6clock divisor,2–6flash RO

Index–4Subject to Change – 17 January 1997Software support,1–7SparseI/O space,A–17, B–1memory space,A–12, B–1Speaker connector pinouts,2–12Special cyc

17 January 1997 – Subject to ChangeIntroduction to the AlphaPC 164 Motherboard 1–1 1Introduction to the AlphaPC 164MotherboardThis chapter provides an

1–2 Introduction to the AlphaPC 164 MotherboardSubject to Change – 17 January 1997System Components and FeaturesFigure 1–1 AlphaPC 164 Functional Bloc

17 January 1997 – Subject to ChangeIntroduction to the AlphaPC 164 Motherboard 1–3System Components and Features1.1.1 Digital Semiconductor 21172 Core

January 1997Possesion, use, or copying of the software described in this publication is authorized only pursuant to a valid written licence from DIGIT

1–4 Introduction to the AlphaPC 164 MotherboardSubject to Change – 17 January 1997System Components and FeaturesTable 1–1 Main Memory Sizes1.1.3 L3 Bc

17 January 1997 – Subject to ChangeIntroduction to the AlphaPC 164 Motherboard 1–5System Components and Features1.1.5 ISA Interface OverviewThe ISA bu

1–6 Introduction to the AlphaPC 164 MotherboardSubject to Change – 17 January 1997Flash Memory Organization1.2 Flash Memory OrganizationThe AlphaPC 16

17 January 1997 – Subject to ChangeIntroduction to the AlphaPC 164 Motherboard 1–7Fail-Safe Booter1.3 Fail-Safe BooterThe fail-safe booter is a small

1–8 Introduction to the AlphaPC 164 MotherboardSubject to Change – 17 January 1997Software Support1.4.2 Alpha SRM Console FirmwareThe Alpha SRM Consol

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–1 2System Configuration and ConnectorsThis chapter describes the user-environ

2–2 System Configuration and ConnectorsSubject to Change – 17 January 1997Figure 2–1 AlphaPC 164 Jumper/Connector/Component LocationMK-2306-35Cache SR

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–3Table 2–1 AlphaPC 164 Jumper/Connector/Component ListItem Number Description

2–4 System Configuration and ConnectorsSubject to Change – 17 January 1997AlphaPC 164 Jumper Configurations2.1 AlphaPC 164 Jumper ConfigurationsThe Al

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–5AlphaPC 164 Jumper ConfigurationsFigure 2–2 AlphaPC 164 Configuration Jumper

17 January 1997 – Subject to Changeiii ContentsPreface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2–6 System Configuration and ConnectorsSubject to Change – 17 January 1997AlphaPC 164 Jumper Configurations2.1.2 System Clock Divisor Jumpers (IRQ3 th

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–7AlphaPC 164 Connector Pinouts2.1.7 Flash ROM Update Jumper (J31)When J31—2/3

2–8 System Configuration and ConnectorsSubject to Change – 17 January 1997AlphaPC 164 Connector PinoutsB43 +3V B44 C/BE#[1] B45 AD[14] B46 GNDB47 AD[1

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–9AlphaPC 164 Connector Pinouts49 IRQ3 50 SA6 51 DACK2# 52 SA553 TC 54 SA4 55

2–10 System Configuration and ConnectorsSubject to Change – 17 January 1997AlphaPC 164 Connector PinoutsTable 2–5 IDE Drive Bus Connector Pinouts (J13

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–11AlphaPC 164 Connector PinoutsTable 2–8 COM1/COM2 Serial Line Connector Pino

2–12 System Configuration and ConnectorsSubject to Change – 17 January 1997AlphaPC 164 Connector PinoutsTable 2–11 Input Power Connector Pinouts (J3)P

17 January 1997 – Subject to ChangeSystem Configuration and Connectors 2–13AlphaPC 164 Connector PinoutsNote:The Halt button is not used with the Wind

17 January 1997 – Subject to ChangePower and Environmental Requirements 3–1 3Power and Environmental RequirementsThis chapter describes the AlphaPC 16

ivSubject to Change – 17 January 19973 Power and Environmental Requirements3.1Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . .

3–2 Power and Environmental RequirementsSubject to Change – 17 January 1997Environmental Requirements3.2 Environmental RequirementsThe 21164 microproc

17 January 1997 – Subject to ChangeFunctional Description 4–1 4Functional DescriptionThis chapter describes the functional operation of the AlphaPC 16

4–2 Functional DescriptionSubject to Change – 17 January 1997AlphaPC 164 Bcache Interface4.1 AlphaPC 164 Bcache InterfaceThe 21164 microprocessor cont

17 January 1997 – Subject to ChangeFunctional Description 4–3Digital Semiconductor 21172 Core Logic Chipset4.2 Digital Semiconductor 21172 Core Logic

4–4 Functional DescriptionSubject to Change – 17 January 1997Digital Semiconductor 21172 Core Logic ChipsetFigure 4–2 Main Memory Interfacedata_h<1

17 January 1997 – Subject to ChangeFunctional Description 4–5Digital Semiconductor 21172 Core Logic Chipset4.2.1 CIA Chip OverviewThe CIA application-

4–6 Functional DescriptionSubject to Change – 17 January 1997PCI DevicesThe DSW chip contains the memory interface data path. This includes a 64-byte

17 January 1997 – Subject to ChangeFunctional Description 4–7PCI DevicesFigure 4–3 AlphaPC 164 PCI Bus DevicesThe PCI bus supports multiplexed, burst

4–8 Functional DescriptionSubject to Change – 17 January 1997PCI DevicesThe bridge from the 21164 system bus to the 64-bit PCI bus is provided by the

17 January 1997 – Subject to ChangeFunctional Description 4–9ISA Bus Devices4.4 ISA Bus DevicesFigure 4–4 shows the AlphaPC 164 ISA bus implementation

17 January 1997 – Subject to ChangevA System Address MappingA.1Address Mapping Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4–10 Functional DescriptionSubject to Change – 17 January 1997ISA Bus DevicesFigure 4–4 AlphaPC 164 ISA Bus DevicesJ15J4J16PCI Busla<23:17>sd<

17 January 1997 – Subject to ChangeFunctional Description 4–11Interrupts4.4.2 Utility Bus Memory DeviceThe AlphaPC 164 Ubus drives a flash ROM memory

4–12 Functional DescriptionSubject to Change – 17 January 1997InterruptsFigure 4–5 Interrupt LogicPCI Bus21164pc164.2irq_reset_lISAPCI-to-ISABridgeCom

17 January 1997 – Subject to ChangeFunctional Description 4–13Interrupts1IPL = interrupt priority level (fixed)Table 4–1 AlphaPC 164 System Interrupts

4–14 Functional DescriptionSubject to Change – 17 January 1997Interrupts1The # symbol indicates an active low signal.Table 4–2 ISA InterruptsInterrupt

17 January 1997 – Subject to ChangeFunctional Description 4–15Interrupts4.5.1 Interrupt PLD FunctionThe MACH210A PLD is an 8-bit I/O slave on the ISA

4–16 Functional DescriptionSubject to Change – 17 January 1997System Clocks4.6 System ClocksFigure 4–7 shows the AlphaPC 164 clock generation and dist

17 January 1997 – Subject to ChangeFunctional Description 4–17System ClocksFigure 4–7 AlphaPC 164 System Clocks21164pc164.282378ZBBridgepc164.2214mhz_

4–18 Functional DescriptionSubject to Change – 17 January 1997System ClocksAt system reset, the 21164 microprocessor’s irq_h<3:0> pins are drive

17 January 1997 – Subject to ChangeFunctional Description 4–19Reset and Initialization4.7 Reset and InitializationA TL7702B power monitor senses the +

viSubject to Change – 17 January 1997B.4.1SIO PCI-to-ISA Bridge Configuration Address Space . . . . . . . . . . . .B–13B.5PCI Special/Interrupt Acknow

4–20 Functional DescriptionSubject to Change – 17 January 1997Reset and InitializationFigure 4–8 System Reset and Initializationpc164.28Fan SensorPowe

17 January 1997 – Subject to ChangeFunctional Description 4–21Serial ROM4.8 Serial ROMThe serial ROM (SROM) provides the following functions:•Initiali

4–22 Functional DescriptionSubject to Change – 17 January 1997DC Power DistributionFigure 4–9 Serial ROM4.9 DC Power DistributionThe AlphaPC 164 deriv

17 January 1997 – Subject to ChangeFunctional Description 4–23DC Power DistributionFigure 4–10 AlphaPC 164 Power DistributionISA Conn. PCI32 Conn.Pull

4–24 Functional DescriptionSubject to Change – 17 January 1997System Software4.10 System SoftwareAlphaPC 164 software consists of the following:•Seria

17 January 1997 – Subject to ChangeFunctional Description 4–25System SoftwareThe Mini-Debugger provides the following:•Basic hardware debugging capabi

17 January 1997 – Subject to ChangeUpgrading the AlphaPC 164 5–1 5Upgrading the AlphaPC 164The AlphaPC 164 can be upgraded in two ways. For higher sys

5–2 Upgrading the AlphaPC 164Subject to Change – 17 January 1997Upgrading DRAM Memory5.2 Upgrading DRAM MemoryThere are three options for upgrading DR

17 January 1997 – Subject to ChangeUpgrading the AlphaPC 164 5–3Increasing Microprocessor SpeedTo widen the memory bus to its 256-bit maximum (upgrade

17 January 1997 – Subject to ChangeviiFigures1–1AlphaPC 164 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 1–21–2Division

5–4 Upgrading the AlphaPC 164Subject to Change – 17 January 1997Increasing Microprocessor SpeedWhen replacing the microprocessor chip, the thermal con

17 January 1997 – Subject to ChangeUpgrading the AlphaPC 164 5–5Increasing Microprocessor Speed5.3.2 Required ToolsThe following tools are required wh

5–6 Upgrading the AlphaPC 164Subject to Change – 17 January 1997Increasing Microprocessor Speed2. Lift the ZIF socket actuator handle to a full 90° an

17 January 1997 – Subject to ChangeUpgrading the AlphaPC 164 5–7Increasing Microprocessor Speeda. Put the GRAFOIL thermal pad in place. The GRAFOIL pa

5–8 Upgrading the AlphaPC 164Subject to Change – 17 January 1997Increasing Microprocessor Speed3. Secure the fan and fan guard to the heat sink with f

17 January 1997 – Subject to ChangeSystem Address Mapping A–1 ASystem Address MappingThis appendix describes the AlphaPC 164 motherboard’s CIA chip ma

A–2 System Address MappingSubject to Change – 17 January 199721164 Address Space Configuration Supported by the CIAFigure A–1 21164 Address SpaceA.2 2

17 January 1997 – Subject to ChangeSystem Address Mapping A–321164 Address Space Configuration Supported by the CIAFigure A–2 21164 Address Space Conf

A–4 System Address MappingSubject to Change – 17 January 199721164 Address Space Configuration Supported by the CIAA.2.1 21164 Access to Address Space

17 January 1997 – Subject to ChangeSystem Address Mapping A–521164 Address Space Configuration Supported by the CIADMA access to system memory is achi

viiiSubject to Change – 17 January 1997Tables1–1Main Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–

A–6 System Address MappingSubject to Change – 17 January 199721164 Address Space Configuration Supported by the CIAThe CIA generates 32-bit PCI addres

17 January 1997 – Subject to ChangeSystem Address Mapping A–721164 Address Space Configuration Supported by the CIAFigure A–5 21164 and DMA Read and W

A–8 System Address MappingSubject to Change – 17 January 199721164 Address SpaceA.3 21164 Address SpaceThis section lists and describes the 21164 addr

17 January 1997 – Subject to ChangeSystem Address Mapping A–921164 Address SpaceThe reasons for using the 21164 I/O space address map are as follows:•

A–10 System Address MappingSubject to Change – 17 January 199721164 Address SpaceA.3.1 PCI Dense Memory SpacePCI dense memory space is located in the

17 January 1997 – Subject to ChangeSystem Address Mapping A–1121164 Address Spacetransactions. Valid longwords surrounding invalid longwords (called a

A–12 System Address MappingSubject to Change – 17 January 199721164 Address SpaceAddress generation in dense space is described in the following list:

17 January 1997 – Subject to ChangeSystem Address Mapping A–1321164 Address Spaceentries in Table A–3, such as word size with address addr<6:5>

A–14 System Address MappingSubject to Change – 17 January 199721164 Address SpaceTable A–3 defines the low-order PCI sparse memory address bits. Addre

17 January 1997 – Subject to ChangeSystem Address Mapping A–1521164 Address SpaceThe high-order PCI address bits ad<31:26> are obtained from eit

17 January 1997 – Subject to ChangeixB–5SIO Bridge Operating Register Address Space Map. . . . . . . . . . . . . . . . B–6B–6Flash ROM Memory Addresse

A–16 System Address MappingSubject to Change – 17 January 199721164 Address SpaceFigure A–7 PCI Memory Sparse Space Address Generation (Region 1)Figur

17 January 1997 – Subject to ChangeSystem Address Mapping A–1721164 Address SpaceFigure A–9 PCI Memory Sparse Space Address Generation (Region 3)The 2

A–18 System Address MappingSubject to Change – 17 January 199721164 Address SpaceFigure A–10 PCI Sparse I/O Space Address Translation (Region A)The hi

17 January 1997 – Subject to ChangeSystem Address Mapping A–1921164 Address SpaceFigure A–11 PCI Sparse I/O Space Address Translation (Region B)The po

A–20 System Address MappingSubject to Change – 17 January 199721164 Address SpaceThe ISA devices have reserved the lower 64KB of PCI I/O space (85.800

17 January 1997 – Subject to ChangeSystem Address Mapping A–2121164 Address SpaceA.3.4 PCI Configuration SpacePCI configuration space is located in th

A–22 System Address MappingSubject to Change – 17 January 199721164 Address SpaceSoftware must program CFG before running a configuration cycle. Spars

17 January 1997 – Subject to ChangeSystem Address Mapping A–2321164 Address Space.1Missing entries (such as word size with addr<6:5> = 112 cause

A–24 System Address MappingSubject to Change – 17 January 199721164 Address SpaceA.3.4.1 Device Select (IDSEL)Peripherals are selected during a PCI co

17 January 1997 – Subject to ChangeSystem Address Mapping A–2521164 Address SpaceNote:If a quadword access is specified for the configuration cycle, t